Zylin soft CPU

The ZPU development takes place at www.opencores.org.

1. The ZPU is now open source. See ZPU mailing list for more details.
2. BSD license for HDL implementations--no hiccups when using in proprietary commercial products. Under the open source royalty free license, there are no limits on what type of technology (FPGA, anti-fuse, or ASIC) in which the ZPU can be implemented.
3. GPL license for architecture, documentation and tools
4. Completely FPGA brand and type neutral implementation
5. 298 LUT @ 125 MHz after P&R with 16 bit datapath and 4kBytes BRAM
6. 442 LUT @ 95 MHz after P&R with 32 bit datapath and 32kBytes BRAM
7. Codesize 80% of ARM thumb
8. Configurable 16/32 bit datapath
9. GCC toolchain(GDB, newlib, libstdc++)
10. Debugging via simulator or GDB stubs
11. HDL simulation feedback to simulator for powerful profiling capabilities
12. Eclipse ZPU plug-in
13. eCos embedded operating system support.

The philosophy behind the ZPU is that a soft-CPU's job is to take up as little FPGA resources as possible and leave heavy-duty processing to the HDL paradigm. Using HDL directly will always be ten to one hundred times faster than first reducing an FPGA to a soft-CPU and then trying recover the lost performance and FPGA resources through a clever soft-CPU implementation.

Of course, if you consider FPGA resource use irrelevant, then you might be better off with a Soft-CPU that takes ten to fifty times more FPGA real estate.

Zylin ZY1000

Zylin ZY1000 ARM ARM7 ARM9 Cortex XScale JTAG debugger